<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<title>stm32f4_blink_led: TIM_TypeDef Struct Reference</title>

<link href="tabs.css" rel="stylesheet" type="text/css"/>
<link href="doxygen.css" rel="stylesheet" type="text/css" />



</head>
<body>
<div id="top"><!-- do not remove this div! -->


<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  
  
  <td style="padding-left: 0.5em;">
   <div id="projectname">stm32f4_blink_led
   &#160;<span id="projectnumber">1.2.2-120323</span>
   </div>
   
  </td>
  
  
  
 </tr>
 </tbody>
</table>
</div>

<!-- Generated by Doxygen 1.7.6.1 -->
  <div id="navrow1" class="tabs">
    <ul class="tablist">
      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
      <li><a href="modules.html"><span>Modules</span></a></li>
      <li class="current"><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li><a href="files.html"><span>Files</span></a></li>
    </ul>
  </div>
  <div id="navrow2" class="tabs2">
    <ul class="tablist">
      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li><a href="functions.html"><span>Data&#160;Fields</span></a></li>
    </ul>
  </div>
</div>
<div class="header">
  <div class="summary">
<a href="#pub-attribs">Data Fields</a>  </div>
  <div class="headertitle">
<div class="title">TIM_TypeDef Struct Reference<div class="ingroups"><a class="el" href="group___peripheral__registers__structures.html">Peripheral_registers_structures</a></div></div>  </div>
</div><!--header-->
<div class="contents">
<!-- doxytag: class="TIM_TypeDef" -->
<p>TIM.  
</p>

<p><code>#include &lt;<a class="el" href="stm32f4xx_8h_source.html">stm32f4xx.h</a>&gt;</code></p>
<table class="memberdecls">
<tr><td colspan="2"><h2><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a61400ce239355b62aa25c95fcc18a5e1">CR1</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a149feba01f9c4a49570c6d88619f504f">RESERVED0</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a2a3e81bd118d1bc52d24a0b0772e6a0c">CR2</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a8249a3955aace28d92109b391311eb30">RESERVED1</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a02758713abfe580460dd5bcd8762702a">SMCR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a5573848497a716a9947fd87487709feb">RESERVED2</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a1481b34cc41018c17e4ab592a1c8cb55">DIER</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a6c3b31022e6f59b800e9f5cc2a89d54c">RESERVED3</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a44962ea5442d203bf4954035d1bfeb9d">SR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#aa0223808025f5bf9c056185038c9d545">RESERVED4</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a980df1a5752e36604de4d71ce14fbfa3">EGR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#abd36010ac282682d1f3c641b183b1b6f">RESERVED5</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a90d89aec51d8012b8a565ef48333b24b">CCMR1</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#aab502dde158ab7da8e7823d1f8a06edb">RESERVED6</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a977b3cf310388b5ad02440d64d03810a">CCMR2</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#ab1820c97e368d349f5f4121f015d9fab">RESERVED7</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#ab1da3e84848ed66e0577c87c199bfb6d">CCER</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#afc22764fbf9ee7ce28174d65d0260f18">RESERVED8</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a6095a27d764d06750fc0d642e08f8b2a">CNT</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#aba5df4ecbb3ecb97b966b188c3681600">PSC</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#ad8b1fadb520f7a200ee0046e110edc79">RESERVED9</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#af17f19bb4aeea3cc14fa73dfa7772cb8">ARR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#aa0663aab6ed640b7594c8c6d32f6c1cd">RCR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#ad68efe7a323ac2fcb823a26c0c51445b">RESERVED10</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#adab1e24ef769bbcb3e3769feae192ffb">CCR1</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#ab90aa584f07eeeac364a67f5e05faa93">CCR2</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a27a478cc47a3dff478555ccb985b06a2">CCR3</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a85fdb75569bd7ea26fa48544786535be">CCR4</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a112c0403ac38905a70cf5aaa9c8cc38a">BDTR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a11e504ee49142f46dcc67740ae9235e5">RESERVED11</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a0afd527a4ec64faf878f9957096102bf">DCR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a2f133f27cf624e76a2ac1092ab5789f7">RESERVED12</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a30c2d8aa9c76dfba0b9a378b64700bda">DMAR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a85b970173fe49d3959c0c7f7528dacf0">RESERVED13</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a47766f433b160258ec05dbb6498fd271">OR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html#a1841fa0366924d522d6ac880fb14d766">RESERVED14</a></td></tr>
</table>
<hr/><h2>Field Documentation</h2>
<a class="anchor" id="af17f19bb4aeea3cc14fa73dfa7772cb8"></a><!-- doxytag: member="TIM_TypeDef::ARR" ref="af17f19bb4aeea3cc14fa73dfa7772cb8" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_t_i_m___type_def.html#af17f19bb4aeea3cc14fa73dfa7772cb8">ARR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM auto-reload register, Address offset: 0x2C </p>

</div>
</div>
<a class="anchor" id="a112c0403ac38905a70cf5aaa9c8cc38a"></a><!-- doxytag: member="TIM_TypeDef::BDTR" ref="a112c0403ac38905a70cf5aaa9c8cc38a" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#a112c0403ac38905a70cf5aaa9c8cc38a">BDTR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM break and dead-time register, Address offset: 0x44 </p>

</div>
</div>
<a class="anchor" id="ab1da3e84848ed66e0577c87c199bfb6d"></a><!-- doxytag: member="TIM_TypeDef::CCER" ref="ab1da3e84848ed66e0577c87c199bfb6d" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#ab1da3e84848ed66e0577c87c199bfb6d">CCER</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM capture/compare enable register, Address offset: 0x20 </p>

</div>
</div>
<a class="anchor" id="a90d89aec51d8012b8a565ef48333b24b"></a><!-- doxytag: member="TIM_TypeDef::CCMR1" ref="a90d89aec51d8012b8a565ef48333b24b" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#a90d89aec51d8012b8a565ef48333b24b">CCMR1</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM capture/compare mode register 1, Address offset: 0x18 </p>

</div>
</div>
<a class="anchor" id="a977b3cf310388b5ad02440d64d03810a"></a><!-- doxytag: member="TIM_TypeDef::CCMR2" ref="a977b3cf310388b5ad02440d64d03810a" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#a977b3cf310388b5ad02440d64d03810a">CCMR2</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM capture/compare mode register 2, Address offset: 0x1C </p>

</div>
</div>
<a class="anchor" id="adab1e24ef769bbcb3e3769feae192ffb"></a><!-- doxytag: member="TIM_TypeDef::CCR1" ref="adab1e24ef769bbcb3e3769feae192ffb" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_t_i_m___type_def.html#adab1e24ef769bbcb3e3769feae192ffb">CCR1</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM capture/compare register 1, Address offset: 0x34 </p>

</div>
</div>
<a class="anchor" id="ab90aa584f07eeeac364a67f5e05faa93"></a><!-- doxytag: member="TIM_TypeDef::CCR2" ref="ab90aa584f07eeeac364a67f5e05faa93" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_t_i_m___type_def.html#ab90aa584f07eeeac364a67f5e05faa93">CCR2</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM capture/compare register 2, Address offset: 0x38 </p>

</div>
</div>
<a class="anchor" id="a27a478cc47a3dff478555ccb985b06a2"></a><!-- doxytag: member="TIM_TypeDef::CCR3" ref="a27a478cc47a3dff478555ccb985b06a2" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_t_i_m___type_def.html#a27a478cc47a3dff478555ccb985b06a2">CCR3</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM capture/compare register 3, Address offset: 0x3C </p>

</div>
</div>
<a class="anchor" id="a85fdb75569bd7ea26fa48544786535be"></a><!-- doxytag: member="TIM_TypeDef::CCR4" ref="a85fdb75569bd7ea26fa48544786535be" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_t_i_m___type_def.html#a85fdb75569bd7ea26fa48544786535be">CCR4</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM capture/compare register 4, Address offset: 0x40 </p>

</div>
</div>
<a class="anchor" id="a6095a27d764d06750fc0d642e08f8b2a"></a><!-- doxytag: member="TIM_TypeDef::CNT" ref="a6095a27d764d06750fc0d642e08f8b2a" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_t_i_m___type_def.html#a6095a27d764d06750fc0d642e08f8b2a">CNT</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM counter register, Address offset: 0x24 </p>

</div>
</div>
<a class="anchor" id="a61400ce239355b62aa25c95fcc18a5e1"></a><!-- doxytag: member="TIM_TypeDef::CR1" ref="a61400ce239355b62aa25c95fcc18a5e1" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#a61400ce239355b62aa25c95fcc18a5e1">CR1</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM control register 1, Address offset: 0x00 </p>

</div>
</div>
<a class="anchor" id="a2a3e81bd118d1bc52d24a0b0772e6a0c"></a><!-- doxytag: member="TIM_TypeDef::CR2" ref="a2a3e81bd118d1bc52d24a0b0772e6a0c" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#a2a3e81bd118d1bc52d24a0b0772e6a0c">CR2</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM control register 2, Address offset: 0x04 </p>

</div>
</div>
<a class="anchor" id="a0afd527a4ec64faf878f9957096102bf"></a><!-- doxytag: member="TIM_TypeDef::DCR" ref="a0afd527a4ec64faf878f9957096102bf" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#a0afd527a4ec64faf878f9957096102bf">DCR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM DMA control register, Address offset: 0x48 </p>

</div>
</div>
<a class="anchor" id="a1481b34cc41018c17e4ab592a1c8cb55"></a><!-- doxytag: member="TIM_TypeDef::DIER" ref="a1481b34cc41018c17e4ab592a1c8cb55" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#a1481b34cc41018c17e4ab592a1c8cb55">DIER</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM DMA/interrupt enable register, Address offset: 0x0C </p>

</div>
</div>
<a class="anchor" id="a30c2d8aa9c76dfba0b9a378b64700bda"></a><!-- doxytag: member="TIM_TypeDef::DMAR" ref="a30c2d8aa9c76dfba0b9a378b64700bda" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#a30c2d8aa9c76dfba0b9a378b64700bda">DMAR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM DMA address for full transfer, Address offset: 0x4C </p>

</div>
</div>
<a class="anchor" id="a980df1a5752e36604de4d71ce14fbfa3"></a><!-- doxytag: member="TIM_TypeDef::EGR" ref="a980df1a5752e36604de4d71ce14fbfa3" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#a980df1a5752e36604de4d71ce14fbfa3">EGR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM event generation register, Address offset: 0x14 </p>

</div>
</div>
<a class="anchor" id="a47766f433b160258ec05dbb6498fd271"></a><!-- doxytag: member="TIM_TypeDef::OR" ref="a47766f433b160258ec05dbb6498fd271" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#a47766f433b160258ec05dbb6498fd271">OR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM option register, Address offset: 0x50 </p>

</div>
</div>
<a class="anchor" id="aba5df4ecbb3ecb97b966b188c3681600"></a><!-- doxytag: member="TIM_TypeDef::PSC" ref="aba5df4ecbb3ecb97b966b188c3681600" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#aba5df4ecbb3ecb97b966b188c3681600">PSC</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM prescaler, Address offset: 0x28 </p>

</div>
</div>
<a class="anchor" id="aa0663aab6ed640b7594c8c6d32f6c1cd"></a><!-- doxytag: member="TIM_TypeDef::RCR" ref="aa0663aab6ed640b7594c8c6d32f6c1cd" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#aa0663aab6ed640b7594c8c6d32f6c1cd">RCR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM repetition counter register, Address offset: 0x30 </p>

</div>
</div>
<a class="anchor" id="a149feba01f9c4a49570c6d88619f504f"></a><!-- doxytag: member="TIM_TypeDef::RESERVED0" ref="a149feba01f9c4a49570c6d88619f504f" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#a149feba01f9c4a49570c6d88619f504f">RESERVED0</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x02 </p>

</div>
</div>
<a class="anchor" id="a8249a3955aace28d92109b391311eb30"></a><!-- doxytag: member="TIM_TypeDef::RESERVED1" ref="a8249a3955aace28d92109b391311eb30" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#a8249a3955aace28d92109b391311eb30">RESERVED1</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x06 </p>

</div>
</div>
<a class="anchor" id="ad68efe7a323ac2fcb823a26c0c51445b"></a><!-- doxytag: member="TIM_TypeDef::RESERVED10" ref="ad68efe7a323ac2fcb823a26c0c51445b" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#ad68efe7a323ac2fcb823a26c0c51445b">RESERVED10</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x32 </p>

</div>
</div>
<a class="anchor" id="a11e504ee49142f46dcc67740ae9235e5"></a><!-- doxytag: member="TIM_TypeDef::RESERVED11" ref="a11e504ee49142f46dcc67740ae9235e5" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#a11e504ee49142f46dcc67740ae9235e5">RESERVED11</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x46 </p>

</div>
</div>
<a class="anchor" id="a2f133f27cf624e76a2ac1092ab5789f7"></a><!-- doxytag: member="TIM_TypeDef::RESERVED12" ref="a2f133f27cf624e76a2ac1092ab5789f7" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#a2f133f27cf624e76a2ac1092ab5789f7">RESERVED12</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x4A </p>

</div>
</div>
<a class="anchor" id="a85b970173fe49d3959c0c7f7528dacf0"></a><!-- doxytag: member="TIM_TypeDef::RESERVED13" ref="a85b970173fe49d3959c0c7f7528dacf0" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#a85b970173fe49d3959c0c7f7528dacf0">RESERVED13</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x4E </p>

</div>
</div>
<a class="anchor" id="a1841fa0366924d522d6ac880fb14d766"></a><!-- doxytag: member="TIM_TypeDef::RESERVED14" ref="a1841fa0366924d522d6ac880fb14d766" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#a1841fa0366924d522d6ac880fb14d766">RESERVED14</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x52 </p>

</div>
</div>
<a class="anchor" id="a5573848497a716a9947fd87487709feb"></a><!-- doxytag: member="TIM_TypeDef::RESERVED2" ref="a5573848497a716a9947fd87487709feb" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#a5573848497a716a9947fd87487709feb">RESERVED2</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x0A </p>

</div>
</div>
<a class="anchor" id="a6c3b31022e6f59b800e9f5cc2a89d54c"></a><!-- doxytag: member="TIM_TypeDef::RESERVED3" ref="a6c3b31022e6f59b800e9f5cc2a89d54c" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#a6c3b31022e6f59b800e9f5cc2a89d54c">RESERVED3</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x0E </p>

</div>
</div>
<a class="anchor" id="aa0223808025f5bf9c056185038c9d545"></a><!-- doxytag: member="TIM_TypeDef::RESERVED4" ref="aa0223808025f5bf9c056185038c9d545" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#aa0223808025f5bf9c056185038c9d545">RESERVED4</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x12 </p>

</div>
</div>
<a class="anchor" id="abd36010ac282682d1f3c641b183b1b6f"></a><!-- doxytag: member="TIM_TypeDef::RESERVED5" ref="abd36010ac282682d1f3c641b183b1b6f" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#abd36010ac282682d1f3c641b183b1b6f">RESERVED5</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x16 </p>

</div>
</div>
<a class="anchor" id="aab502dde158ab7da8e7823d1f8a06edb"></a><!-- doxytag: member="TIM_TypeDef::RESERVED6" ref="aab502dde158ab7da8e7823d1f8a06edb" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#aab502dde158ab7da8e7823d1f8a06edb">RESERVED6</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x1A </p>

</div>
</div>
<a class="anchor" id="ab1820c97e368d349f5f4121f015d9fab"></a><!-- doxytag: member="TIM_TypeDef::RESERVED7" ref="ab1820c97e368d349f5f4121f015d9fab" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#ab1820c97e368d349f5f4121f015d9fab">RESERVED7</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x1E </p>

</div>
</div>
<a class="anchor" id="afc22764fbf9ee7ce28174d65d0260f18"></a><!-- doxytag: member="TIM_TypeDef::RESERVED8" ref="afc22764fbf9ee7ce28174d65d0260f18" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#afc22764fbf9ee7ce28174d65d0260f18">RESERVED8</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x22 </p>

</div>
</div>
<a class="anchor" id="ad8b1fadb520f7a200ee0046e110edc79"></a><!-- doxytag: member="TIM_TypeDef::RESERVED9" ref="ad8b1fadb520f7a200ee0046e110edc79" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint16_t <a class="el" href="struct_t_i_m___type_def.html#ad8b1fadb520f7a200ee0046e110edc79">RESERVED9</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Reserved, 0x2A </p>

</div>
</div>
<a class="anchor" id="a02758713abfe580460dd5bcd8762702a"></a><!-- doxytag: member="TIM_TypeDef::SMCR" ref="a02758713abfe580460dd5bcd8762702a" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#a02758713abfe580460dd5bcd8762702a">SMCR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM slave mode control register, Address offset: 0x08 </p>

</div>
</div>
<a class="anchor" id="a44962ea5442d203bf4954035d1bfeb9d"></a><!-- doxytag: member="TIM_TypeDef::SR" ref="a44962ea5442d203bf4954035d1bfeb9d" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint16_t <a class="el" href="struct_t_i_m___type_def.html#a44962ea5442d203bf4954035d1bfeb9d">SR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>TIM status register, Address offset: 0x10 </p>

</div>
</div>
<hr/>The documentation for this struct was generated from the following file:<ul>
<li>D:/123/stm32f4_blink_led-1.2.2-120323/inc/<a class="el" href="stm32f4xx_8h_source.html">stm32f4xx.h</a></li>
</ul>
</div><!-- contents -->


<hr class="footer"/><address class="footer"><small>
Generated on Fri Mar 23 2012 00:11:24 for stm32f4_blink_led by &#160;<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/>
</a> 1.7.6.1
</small></address>

</body>
</html>
